This page contains information and links for the software included on this CD. To use the software you will need install it in a convenient location on your hard drive (details are provided below).
Note that the software included here might not be the latest version by the time you read this. You can check the companion web page to find out about more recent versions of the software.
Electric is a computer-aided design system for VLSI circuit design. Electric designs MOS and bipolar integrated circuits, printed-circuit-boards, or any type of circuit you choose. It has many editing styles including layout, schematics, artwork, and architectural specifications. A large set of tools is available including design-rule checkers, simulators, routers, layout generators, and more.
Electric interfaces to most popular CAD specifications including VHDL, CIF, and GDS II. It features a unique layout-constraint system, which enables top-down design by enforcing consistency of connections.
Electric is distributed in accordance with the terms and conditions of the GNU General Public Licence.
Compiles under: Windows, Unix, Mac OS
GateSim simulates the action of integrated circuit gates as used in sequential circuits like a computer. A power-on reset signal and both phases of square-wave non-overlapping clock are provided, along with a built-in ROM and RAM macro capability. Simulation is normalized to a standardized gate delay, with memory access delays being somewhat longer, depending on the memory size.
The execution of the complete circuit network can be selectively traced at periodic intervals set by the user, and showing the signals selected by the user. You can choose one of several trace intervals, respectively for viewing instruction execution at clock rate, or at 10x clock rate to see signal settling delays, or at gate delay rate to see every excruciating detail.
GateSim is distributed with permission from Tom Pittman of Southwest Baptist University
GHDL is a VHDL simulator based on GCC technology. GHDL implements the VHDL language according to the IEEE 1076-1987 or the IEEE 1076-1993 standard. GHDL compiles VHDL files and creates a binary that simulates (or executes) your design. GHDL does not do synthesis; it cannot translate your design into a netlist.
GHDL implements nearly all of the VHDL87 (common name for IEEE 1076-1987) standard, most features of VHDL93 (aka IEEE 1076-1993) and the protected types of VHDL00 (aka IEEE 1076a or IEEE 1076-2000). The VHDL version can be selected with a command line option. Some VHDL features, such as overflow checking, are not implemented. However, it is complete enough to compile the std_logic_1164 package or the VITAL packages. It has also successfully compiled and run a DLX processor and the the LEON1 SPARC processor.
GHDL is distributed in accordance with the terms and conditions of the GNU General Public Licence.
Compiles under: Linux
Icarus Verilog is a Verilog simulation and synthesis tool; it compiles source code writen in Verilog into a variety of target formats. For batch simulation, the compiler can generate an intermediate form. For synthesis, the compiler generates netlists in the desired format. The compiler proper is intended to parse and elaborate design descriptions written to the IEEE standard IEEE Std 1364-2001.
Icarus Verilog is a work in progress, and since the language standard is not standing still either, it probably always will be. To install Icarus Verilog, you can use the binary packages or compile from source code included on this CD. Note: the Windows and MacOSX binaries are over a year old; if you are feeling adventurous, try compiling the source code which is a recent snapshot with extra features and bugfixes. Also you can visit the developer's website to check for more recent versions.
Icarus Verilog is distributed in accordance with the terms and conditions of the GNU General Public Licence.
MAC OS X
Compiles under: Windows, Unix, Mac OS X.
MIPS SDE (Software Development Environment) is a cross-development system for MIPS architecture processors. It produces loadable/rommable code for a variety of MIPS-based platforms and also simulator platforms. It is intended for building and debugging statically-linked applications to run in embedded environments on "bare-metal" CPUs or light-weight operating systems.
SDE-lite is a free version of SDE; the difference is (a) you don't get re-usable source code for the proprietary libraries, and (b) you don't get user support from MIPS Technologies, Inc. You can get these extras by purchasing a full copy from MIPS Technologies.
WINDOWS and LINUX
The MipsIt system is part of the laboratory excercise environment used at Lund University and the Royal Institute of Technology (KTH) in Sweden for instructing students of computer engineering. A primary motivation in the development of the software is to assist the learning of computer organization by students in their own time, using their own computer. MipsIt consists of a software development environment, a system and cache simulator, and a highly flexible microarchitecture simulator used for pipelining studies.
MipsIt is distributed with permission from Lund University.
Spim is a self-contained simulator that will run MIPS R2000/R3000 assembly language programs. It reads and immediately executes assembly language code for this processor (it does not execute binary programs). Spim provides a simple debugger and minimal set of operating system services.
Spim implements almost the entire MIPS assembler-extended instruction set for the R2000/R3000. It omits some complex floating point comparisons and rounding modes and details of the memory system page tables. The MIPS architecture has evolved considerably since then (in particular, from 32 to 64 bits), which means that spim will not run programs compiled for recent MIPS or SGI processors. MIPS compilers also generate a number of assembler directives that spim cannot process. These directives can be safely deleted.
Spim implements both a simple, terminal-style interface and a visual windowing interface. On Unix, the spim program provides the terminal interface and the xspim program provides the X window interface. On PCs, PCSpim provides the Windows interface. Macs are not explicitly supported, but the Unix/X window source will compile under Mac OS X.
Compiles under: Windows, Unix, Mac OS X
Xilinx offers a wide range of software tools to support design of Xilinx FGPAs. Tools include the Xilinx Integrated Software Enviroment (ISE), ChipScope Pro for real-time debug and verification, and the ModelSim Xilinx Edition II (MXE II) VHDL/Verilog simulator.
ISE and ChipScope Pro Evaluation versions are fully functioning versions of Xilinx design software with a 60-day time-limited license. ISE WebPACK offers free downloadable design tools with no time limit, limited to lower-density FPGA and CPLD design. All are ideal for the educational environment.