root/membarrier.h

INCLUDED FROM

   1 /*****************************************************************************
   2  * Copyright (C) 2014 Kapil Arya <kapil@ccs.neu.edu>                         *
   3  * Copyright (C) 2014 Gene Cooperman <gene@ccs.neu.edu>                      *
   4  *                                                                           *
   5  * DMTCP is free software: you can redistribute it and/or                    *
   6  * modify it under the terms of the GNU Lesser General Public License as     *
   7  * published by the Free Software Foundation, either version 3 of the        *
   8  * License, or (at your option) any later version.                           *
   9  *                                                                           *
  10  * DMTCP is distributed in the hope that it will be useful,                  *
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of            *
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             *
  13  * GNU Lesser General Public License for more details.                       *
  14  *                                                                           *
  15  * You should have received a copy of the GNU Lesser General Public          *
  16  * License along with DMTCP.  If not, see <http://www.gnu.org/licenses/>.    *
  17  *****************************************************************************/
  19 #ifndef MEM_BARRIER_H
  20 #define MEM_BARRIER_H
  22 #if defined(__i386__) || defined(__x86_64__)
  23 # if defined(__i386__) && defined(__PIC__)
  24 // FIXME:  After DMTCP-1.2.5, this can be made only case for i386/x86_64
  25 #  define RMB asm volatile ("lfence" \
  26                            : : : "eax", "ecx", "edx", "memory")
  27 #  define WMB asm volatile ("sfence" \
  28                            : : : "eax", "ecx", "edx", "memory")
  29 #  define IMB
  30 # else
  31 #  define RMB asm volatile ("xorl %%eax,%%eax ; cpuid" \
  32                            : : : "eax", "ebx", "ecx", "edx", "memory")
  33 #  define WMB asm volatile ("xorl %%eax,%%eax ; cpuid" \
  34                            : : : "eax", "ebx", "ecx", "edx", "memory")
  35 #  define IMB
  36 # endif
  37 #elif defined(__arm__)
  38 # define RMB asm volatile (".arch armv7-a \n\t dsb ; dmb" : : : "memory")
  39 # define WMB asm volatile (".arch armv7-a \n\t dsb ; dmb" : : : "memory")
  40 # define IMB asm volatile (".arch armv7-a \n\t isb" : : : "memory")
  41 #elif defined(__aarch64__)
  42 # define RMB asm volatile ("dsb sy ; dmb sy" : : : "memory")
  43 # define WMB asm volatile ("dsb sy ; dmb sy" : : : "memory")
  44 # define IMB asm volatile ("isb" : : : "memory")
  45 #else
  46 # error "instruction architecture not implemented"
  47 #endif
  49 #endif