Node:Interfacing to other languages, Previous:Top entity, Up:GHDL implementation of VHDL
You can define a subprogram in a foreign language (such as C or Ada) and import it in a VHDL design.
Only subprograms (functions or procedures) can be imported, using the foreign attribute. In this example, the sin function is imported:
package math is
function sin (v : real) return real;
attribute foreign of sin : function is "VHPIDIRECT sin";
end math;
package body math is
function sin (v : real) return real is
begin
assert false severity failure;
end sin;
end math;
A subprogram is made foreign if the foreign attribute decorates it. This attribute is declared in the 1993 revision of the std.standard package. Therefore, you cannot use this feature in VHDL 1987.
The decoration is achived through an attribute specification. The attribute specification must be in the same declarative part as the subprogram and must be after it. This is a general rule for specifications. The value of the specification must be a locally static string.
Even when a subprogram is foreign, its body must be present. However, since it won't be called, you can made it empty or simply but an assertion.
The value of the attribute must start with VHPIDIRECT (an upper-case keyword followed by one or more blanks). The linkage name of the subprogram follows.